Commits
- Commit:
6cf82f681b402f01a9898e748f2533858f618040- From:
- Murilo Ijanc <murilo.ijanc@kovi.com.br>
- Date:
update main to pure ring 0 kernel, remove server dependencies
- Commit:
69cdec6c61e7866110f917f1f5bf4d3381b029a5- From:
- Murilo Ijanc <murilo.ijanc@kovi.com.br>
- Date:
add syscall/sysret interface for ring 3 to ring 0 transition
- Commit:
28328e7600e718a0b0b419e39f5bcdfe01cd17f4- From:
- Murilo Ijanc <murilo.ijanc@kovi.com.br>
- Date:
add synchronous ipc with endpoints, send, recv and call
- Commit:
e1940d574f26f4e261757461655d7290fe1ff4e9- From:
- Murilo Ijanc <murilo.ijanc@kovi.com.br>
- Date:
add task context switch and round-robin scheduler
- Commit:
a9f11a50ab3f672b1b1a7799b89ef63e2eff0e26- From:
- Murilo Ijanc <murilo.ijanc@kovi.com.br>
- Date:
add paging, physical memory manager and kernel heap allocator
- Commit:
2935cd12356e32581616d26dedee999d49dd98ba- From:
- Murilo Ijanc <murilo.ijanc@kovi.com.br>
- Date:
add idt with exception handlers, pic remapping and pit timer
- Commit:
86eeeaadbb2bf02bbf0095e1e915e69bea6db6e0- From:
- Murilo Ijanc <murilo.ijanc@kovi.com.br>
- Date:
split port, serial and vga into modules, add gdt with tss
- Commit:
650c79ed1d1a5f16ff3ad46e4a32c1a75d608124- From:
- Murilo Ijanc <murilo.ijanc@kovi.com.br>
- Date:
add serial and vga text output, print ALIVE on boot
- Commit:
c40788ab652e5648301786507982a694873230ff- From:
- Murilo Ijanc <murilo.ijanc@kovi.com.br>
- Date:
add bare-metal x86_64 kernel with limine boot protocol
- Commit:
90b4b8d036e3b3717609c3b4654d56c475d05bda- From:
- Murilo Ijanc <murilo.ijanc@kovi.com.br>
- Date:
hello bare metal
- Commit:
e38ece4fd2fe73e976661ab744ccd78f22b31151- From:
- Murilo Ijanc <murilo.ijanc@kovi.com.br>
- Date:
Init
